CVE-2026-98946

In the Linux kernel, the following vulnerability has been resolved:

drm/vc4: Disable the V3D interrupt across runtime suspend

vc4 irq disable() masks the V3D interrupt sources and then calls synchronize irq() before the V3D is powered down. However, by itself, this is not enough to quiesce the interrupt handler.

synchronize irq() waits for handlers that have already set IRQD IRQ INPROGRESS, and for irqchips reporting IRQCHIP STATE ACTIVE. A GIC interrupt chip is able to mark an interrupt active as soon as a CPU acknowledges it, so there these checks cover the whole dispatch path. On RPi 0-3, however, the interrupt controller is ARMCTRL, which has no active state. A CPU that has read the hwirq out of the pending register but has not yet reached handle level irq() stays invisible to synchronize irq().

During a power transition, vc4 irq() may therefore run after the power domain is off, where every V3D register read will return 0xdeadbeef. 0xdeadbeef has FLDONE, FRDONE and OUTOMEM set. This problem doesn't trigger NULL pointer dereference issues only because the functions vc4 irq finish bin job() and vc4 irq finish render job() return early when there is no job pointer, but OUTOMEM is still able to schedule vc4 overflow mem work() after vc4 irq disable() has already cancelled it.

Therefore, fix the spurious interrupts by disabling the interrupt line across the PM transition. To preserve the enable/disable balance, move vc4 irq install() and request the IRQ line disabled before the first runtime resume.