PT-2026-2850 · Arm · Arm Cpu
CVE-2025-0647
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Publicado
2026-01-14
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Atualizado
2026-01-14
CVSS v3.1
7.9
Alta
| Vetor | AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:N |
Name of the Vulnerable Software and Affected Versions
Arm CPUs (affected versions not specified)
Description
A condition in certain Arm CPUs can cause a CPP RCTX instruction executed on one Processing Element (PE) to prevent TLB invalidation when a TLBI is issued to that PE, whether by the same PE or another PE within the shareability domain. This can result in a PE retaining outdated TLB entries that should have been invalidated by the TLBI instruction. TLB stands for Translation Lookaside Buffer, and TLBI stands for Translation Lookaside Buffer Invalidation.
Recommendations
At the moment, there is no information about a newer version that contains a fix for this vulnerability.
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Enumeração de Fraquezas
Identificadores relacionados
Produtos afetados
Arm Cpu