Henrique Kawakami

The issue is related to the implementation of the Indirect Branch Prediction Barrier (IBPB) mechanism in AMD processor microcode, which may lead to a potential information disclosure due to incorrect clearing of the Return Address Stack (RAS). This could allow an attacker to obtain sensitive information using a side channel. The vulnerability is being actively exploited.

A potential issue in AMD processors using frequency scaling may allow an authenticated attacker to execute a timing attack, potentially enabling information disclosure. The vulnerability is related to the implementation of Dynamic Voltage and Frequency Scaling (DVFS) in AMD processor microcode, which is associated with inadequate protection of physical side channels. Exploitation of the issue may allow a remote attacker to gain unauthorized access to protected information using a side channel.

The issue is related to the LFENCE/JMP module in AMD CPUs, specifically concerning the branch prediction mechanism. This allows an attacker to access protected memory from a program without the necessary privileges by exploiting indirect branch prediction.

The issue is related to Microarchitectural Data Sampling Uncacheable Memory (MDSUM) on some microprocessors that utilize speculative execution. This may allow an authenticated user with local access to potentially enable information disclosure via a side channel. An attacker with local access to a targeted system may exploit this issue to obtain data on the targeted system, causing some information leakage.

The issue is related to Microarchitectural Load Port Data Sampling (MLPDS), which may allow an authenticated user to potentially enable information disclosure via a side channel with local access. This is due to the incorrect implementation of saving outdated operation results in the load port table. The exploitation of this issue can allow an attacker to access confidential information.

The issue is related to Microarchitectural Fill Buffer Data Sampling (MFBDS), which may allow an authenticated user to potentially enable information disclosure via a side channel with local access. This is due to the speculative execution utilized by some microprocessors.