PT-2023-1507
CVE-2022-27672
·
Published
2023-02-10
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Updated
2026-10-31
Description by
CVSS 3.1
4.7
MediumMetricsAV:L/AC:H/PR:L/UI:N/S:U/C:H/I:N/A:N
Name of the Vulnerable Software and Affected Versions
AMD processors (affected versions not specified)
Description
When SMT is enabled, certain AMD processors may speculatively execute instructions using a target from the sibling thread after an SMT mode switch, potentially resulting in information disclosure. This issue is related to errors occurring after a core exits the C0 sleep state. Exploitation of this issue may allow an attacker to disclose protected information, including access to the return address predictor cache.
Recommendations
At the moment, there is no information about a newer version that contains a fix for this vulnerability.
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