PT-2026-121937
CVE-2026-98965
·
Published
2026-10-23
·
Updated
2026-10-23
Description by
Score
N/A
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In the Linux kernel, the following vulnerability has been resolved:
ice: Restore Ordered MMIO Writes for Tx Doorbells
The DQL accounting state which tracks the number of bytes queued for the
NIC to transmit, namely dql->num queued, is updated by the ICE driver
when it invokes netdev tx sent queue(). Subsequently the driver
updates the hardware queue tail allowing the NIC to begin processing the
work queue. The queue accounting update should be ordered before the NIC
begins transmitting descriptors.
The transmit path currently updates the hardware doorbell using
writel relaxed(), which (on arm64) does not provide the same ordering
guarantees between writes to normal memory and writes to MMIO registers
that writel() does. This introduces a potential race where the NIC
begins transmitting descriptors before the dql->num queued update is
globally visible. If the NIC finishes before the update is observed by
dql completed(), it detects an invalid state where more bytes have been
completed than have been queued. When this happens the following BUG ON
is triggered.
BUG ON(count > num queued - dql->num completed);
This has been observed and manifests as the following crash (note that
the trace has been trimmed) in an environment with sustained network
load that uses an Intel Corporation Ethernet Controller E810-XXV for SFP
(rev 02) on an arm64 machine. Replacing writel relaxed() with writel()
in a test kernel eliminated the crash in the user's workload, which
previously reproduced the issue reliably.
kernel BUG at lib/dynamic queue limits.c:99
Internal error: Oops - BUG: 00000000f2000800 [#1] SMP
pc : dql completed+0x268/0x2a0
lr : ice clean tx irq+0x1d4/0x620 [ice]
Call trace:
dql completed+0x268/0x2a0 (P)
ice napi poll+0x94/0x520 [ice]
napi poll+0x48/0x3f0
net rx action+0x194/0x420
This restores the behaviour prior to commit ccde82e90946 ("ice: add E830
Earliest TxTime First Offload support"), which changed the notification
mechanism from writel() to writel relaxed().
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