PT-2026-52312

CVE-2026-53217

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Published

2026-06-25

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Updated

2026-10-18

Description by

CVSS 3.1
8.6
High
MetricsAV:N/AC:L/PR:N/UI:N/S:U/C:H/I:L/A:L
Name of the Vulnerable Software and Affected Versions Linux kernel (affected versions not specified)
Description An issue exists in the mvpp2 driver where the CPU synchronization for received data is incorrectly aligned. The driver programs the RX queue packet offset such that hardware writes data at dma addr + MVPP2 SKB HEADROOM. However, the CPU sync starts at dma addr and only covers rx bytes + MVPP2 MH SIZE bytes. This causes the system to sync unused headroom while missing bytes at the packet tail. On non-coherent DMA (Direct Memory Access) systems—systems where the CPU and DMA-capable hardware do not share a consistent view of memory—this can result in the CPU reading stale cache contents for the end of the received frame. The issue is addressed by using the dma sync single range for cpu() function with MVPP2 SKB HEADROOM as the range offset.
Recommendations At the moment, there is no information about a newer version that contains a fix for this vulnerability.
Exploitability
Exploit
Impacts
Vendors
Affected products
Weakness enumeration
Related identifiers
ECHO-6CF1-8347-9AD1
OPENSUSE-SU-2026:21388-1
SUSE-SU-2026:22742-1
SUSE-SU-2026:22769-1
SUSE-SU-2026:22809-1
SUSE-SU-2026:22810-1
SUSE-SU-2026:22812-1
SUSE-SU-2026:22835-1
SUSE-SU-2026:22903-1
SUSE-SU-2026:22904-1
SUSE-SU-2026:3130-1
SUSE-SU-2026:3166-1
USN-8726-1
USN-8726-2
USN-8726-3
USN-8726-4
USN-8727-1
USN-8728-1
USN-8728-2
USN-8728-3
USN-8760-1
USN-8760-2
USN-8781-1
USN-8800-1
USN-8875-1
USN-8875-2
USN-8876-1
USN-8877-1
USN-8878-1
USN-8879-1
USN-8903-1
USN-8903-2
USN-8904-1
USN-8905-1
USN-8905-2
USN-8906-1
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