PT-2026-60840 · Openrisc · Or1200
CVE-2025-51677
·
Published
2026-07-17
·
Updated
2026-07-20
CVSS v3.1
9.1
Critical
| Vector | AV:N/AC:L/PR:N/UI:N/S:U/C:N/I:H/A:H |
Name of the Vulnerable Software and Affected Versions
openRISC OR1200 commit 83ac6b
Description
An output mismatch exists between the Register Transfer Level (RTL), which is a high-level description of the electronic circuit, and the netlist, which is a detailed description of the circuit's connectivity, specifically regarding the or1200 cpu output port. This discrepancy can result in unexpected behavior of the processor.
Recommendations
At the moment, there is no information about a newer version that contains a fix for this vulnerability.
Improper Encoding or Escaping of Output
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Weakness Enumeration
Related Identifiers
Affected Products
Or1200